1. Field of the Invention
The present invention relates to semiconductor devices and methods of forming the same. More specifically, the present invention is directed to non-volatile memory devices and methods of forming the same.
2. Description of Related Art
Non-volatile memory devices retain their stored data even when their power supplies are interrupted. Representative non-volatile memory devices are flash memory devices. Conventionally, flash memory devices have a stacked gate structure that is advantageous in high integration density. A flash memory cell of a typical stacked gate structure is disclosed in Korean Patent Application No. 10-0396698, which will now be described with reference to FIG. 1.
As illustrated in FIG. 1, a control gate electrode 5 is disposed on a semiconductor substrate 1. A floating gate 3 is interposed between the control gate electrode 5 and the semiconductor substrate 1. A tunnel oxide layer 2 is interposed between the floating gate 3 and the semiconductor substrate 1. A dielectric layer 4 is interposed between the control gate electrode 5 and the floating gate 3. The floating gate 3 is electrically isolated by the tunnel oxide layer 2 and the dielectric layer 4.
The conventional flash memory cell stores data of logic “1” or “0” based on the amount of charges stored in the floating gate 3.
Various issues arise as conventional flash memory cells are further developed for higher integration. For example, the width of a channel region below the floating gate 3 tends to decrease, so that the turn-on current of the flash memory cell may decrease sharply to increase the sensing margin of the flash memory device. Further, as the overlap area of the floating gate 3 and the control gate 5 decreases, the coupling ratio of the flash memory cell may decrease to increase the operation voltage of the flash memory cell. Due to the increase in the operation voltage, the power consumption of a device increases and a boundary portion of the substrate 1 may damage, causing the reliability of the flash memory cell to degrade.